Efficient Switching Activity Reduction Technique for Fault Tolerant Data Bus
In Deep-Sub-Micron (DSM) systems, the crosstalk effect on on-chip data buses and interconnects dictates the overall performance and reliability of the highly integrated systems. In many digital processors and SoC the reliable transfer of the information over the data bus is crucial for the proper operation of a particular system. Hence ECC techniques are used on data buses for reliable transfer of the information. Employing the ECC on data buses eventually increases the switching activity that affects the power consumption and delay of the system. Reducing the power dissipation of the VLSI chip is one of the major challenges in the DSM technology.