International Academy of Science , Engineering and Technology (IASET)
For performing larger number mathematical calculation in less time is one of the important operation. But multiplication spent more time to perform its calculation, so there is requirement of high speed, low delay and low power consumption multiplier is important in the digital signal processors. Multiplier is one important block in the digital signal processor, computer. There are various multiplier architectures are present, but in that simple multiplication is done using Vedic mathematics through Vedic multiplier. Vedic multiplier uses Vedic mathematics such as Urdhva Triyakbhyam and Nikhilam sutra. Using that multiplier, the authors have low power consumption, low delay and high speed. Which has become one of the important key area in VLSI design using CMOS challenging technology.