Institute of Electrical & Electronic Engineers
Looping operations impose a significant bottleneck to achieving better computational efficiency for embedded applications. In this paper, a novel Zero-Overhead Loop Controller (ZOLC) supporting arbitrary loop structures with multiple-entry and multiple-exit nodes is described and utilized to enhance embedded RISC processors. A graph formalism is introduced for representing the loop structure of application programs, which can assist in ZOLC code synthesis. Also, a portable description of a ZOLC component is given in detail, which can be exploited in the scope of RTL synthesis for enabling its utilization.