Embedded CMP Architecture Shared Multi-Channel On-Chip Memory Pool

Provided by: AICIT
Topic: Hardware
Format: PDF
To efficiently support embedded applications, a kind of Shared Multi-Channel On-Chip Memory CMP architecture (SMC-OCM) is proposed in this paper. The shared on-chip memory is designed to be organized with several independent data channels. Multi-channel organization of on-chip memory supports concurrent memory accesses at physical level and makes it to be reality to access memory in real-time. Analysis and experiments show that SMC-OCM architecture is a kind of embedded-applications-oriented CMP architecture for it works well on real-time performance and has better system scalability.

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