Provided by: Carnegie Mellon University
Date Added: Mar 2012
Hybrid main memories composed of DRAM as a cache to scalable non-volatile memories such as Phase-Change Memory (PCM) can provide much larger storage capacity than traditional main memories. A key challenge for enabling high-performance and scalable hybrid memories, though, is efficiently managing the metadata (e.g., tags) for data cached in DRAM at a fine granularity. Based on the observation that storing metadata off-chip in the same row as their data exploits DRAM row buffer locality, this paper reduces the overhead of fine-granularity DRAM caches by only caching the metadata for recently accessed rows on-chip using a small buffer. Leveraging the flexibility and efficiency of such a fine-granularity DRAM cache, the authors also develop an adaptive policy to choose the best granularity when migrating data into DRAM.