Energy-Efficient Low Latency IIR Using Enhanced Boost Logic

In this paper, the authors propose a 6-tap 8-bit IIR filter which uses novel charge recovery logic, called enhanced boost logic, which achieves high efficiency and high performance operation through the use of aggressive voltage scaling, gate overdrive and charge-recovery techniques. A 6-tap 8-bit IIR filter implemented using enhanced boost logic with only 1.5 cycles of latency overhead compared to a static CMOS implementation. The IIR using EBL logic dissipates only 24mW which achieves 36.07% improvement compared to previously reported FIR filter (14 tap 8-bit FIR).

Provided by: IT Society of India (ITSI) Topic: Hardware Date Added: Jul 2013 Format: PDF

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