Energy Optimization Using Fine-Grain Variable Stages Pipeline Processor Chip

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Provided by: Mie University
Topic: Hardware
Format: PDF
Increased energy consumption in processors caused by performance enhancement has recently become a critical problem. Many current processors employ Dynamic Voltage and Frequency Scaling (DVFS) which dynamically lowers the supply voltage and clock frequency in order to reduce energy consumption. However, it is difficult to deliver ne-grain energy optimization by using DVFS. Since a voltage regulator takes a long time for scaling the voltage and charging/discharging a power line has a large energy overhead, the useful interval of DVFS is limited to coarse-grain.
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