Energy-Performance Design Space Exploration in SMT Architectures Exploiting Selective Load Value Predictions

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Provided by: edaa
Topic: Hardware
Format: PDF
This paper presents a design space exploration of a selective load value prediction scheme suitable for energy-aware Simultaneous Multi-Threaded (SMT) architectures. A load value predictor is an architectural enhancement which speculates over the results of a micro-processor load instruction to speed-up the execution of the following instructions. The proposed architectural enhancement differs from a classic predictor due to an improved selection scheme that allows to activate the predictor only when a miss occurs in the first level of cache. The authors analyze the effectiveness of the selective predictor in terms of overall energy reduction and performance improvement.
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