Enrichment Towards the Design of Efficient 4 Bit Reversible Subtractor Using TR Gate: A Low Power Application
Reversible logic has widespread employments in quantum computing and low power VLSI design. In this paper, the author will put forward the design, synthesis and simulation of novel reversible subtractor to submit an application of reversible logic. The reversible plan, synthesis and simulation of a 4 bit subtractor will be verified using a reversible TR gate. Idyllically, reversible circuits squander nil energy i.e. zero energy. Thus, it would be of enormous significance to apply reversible logic to designing.