Equivalence Between Schedule Representations: Theory and Applications

Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
Multiprocessor scheduling problems are hard because of the numerous constraints on valid schedules to take into account. This paper presents new schedule representations in order to overcome these difficulties, by allowing processors to be fractionally allocated. The authors prove that these representations are equivalent to the standard representations when preemptive scheduling is allowed. This allows the creation of scheduling algorithms and the study of feasibility in the simpler representations. They apply this method throughout the paper.

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