Provided by: Association for Computing Machinery
Phase Change Memory (PCM) has recently emerged as a promising nonvolatile memory technology. To effectively increase memory capacity and reduce per bit fabrication cost, Multi-Level Cell (MLC) PCM stores more than one bit per cell by differentiating multiple intermediate resistance levels. However, MLC PCMsuffers from significantly shortened endurance due to its large RESET current that initiates the cell state. In this paper, the authors propose Elastic RESET (ER) to construct non-2n-state MLC PCM, e.g., 3-state MLC PCM instead of 4-state one for 2-bit MLC. They then adopt data compression and propose fraction encoding to store com-pressed data using non-2n-state MLC.