Estimation of Leakage Power Using Power Reduction Circuit

Provided by: International Journal of Engineering Innovations and Research (IJEIR)
Topic: Hardware
Format: PDF
Scaling associate in nursing power reduction trends in future technologies can cause subthreshold run currents to become an progressively massive part of total power dissipation. The big run power consumption is especially hard in mobile devices, wherever the battery charge capability poses a demanding limitation on the entire energy which will be consumed by a chip. During this technique, sleep transistor square measure placed between the circuits offer and provide rails to show off the run current flow throughout idle time this will be done by victimization one PMOS transistor and one NMOS transistor nonparallel with the transistors of every logic block to make a virtual ground and a virtual power supply.

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