Evolutionary Techniques in Synthesis of Multiple-Valued Logic Functions
The Radix (R) used in Multiple-Valued Logic (MVL) circuits goes beyond the binary case (R = 2). MVLRead Only Memory (ROM), Random Access Memory (RAM), and Digital Signal Processing (DSP) systems have been successfully implemented using Complementary Metal Oxide Semiconductor (CMOS) Technology. The complexity of exact synthesis of MVL circuits is prohibitively large. This is because of the enormous solution search space. The Direct Cover (DC) algorithm is a well-known heuristic for synthesis of MVL functions. The algorithm selects the next min-term to be covered and the appropriate implicant to cover it in an iterative manner using a set of synthesis criteria.