Exploiting Dataflow to Extract Java Instruction Level Parallelism on a Tag-Based Multi-Issue Semi In-Order (TMSI) Processor

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
To design a Java processor with traditional modern processor architecture, the Instruction Level Parallelism (ILP) is not readily exploitable due to stack operands dependencies. This paper presents a dataflow-based instruction tagging scheme. With instruction tagging, the independent bytecode instruction groups with stack dependences are identified. The different bytecode instruction group can be executed in parallel because there are no stack dependences among them. With the instruction tagging scheme, the authors propose a Tag-based Multi-issue Semi-In-order (TMSI) Java processor.
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