Association for Computing Machinery
Three-Dimensional Integrated Circuits (3D ICs) offer a promising solution to overcome the on-chip communication bottleneck and improve performance over traditional Two-Dimensional (2D) ICs. Long interconnects can be replaced by much shorter vertical Through Silicon Via (TSV) interconnects in 3D ICs. This paper enables faster and more power efficient inter-core communication across multiple silicon layers. However, 3D IC technology also faces challenges due to higher power densities and routing congestion due to TSV pads distributed on each layer.