Institute of Electrical & Electronic Engineers
With increasing SW content of modern System-on-Chip (SoC) designs, modeling of embedded SW has become critical. For one, analyzing software performance early in the system design flow is now paramount to an efficient implementation. Previous work addressed performance modeling with timing annotated functional models and exposed dynamic scheduling effects with behavioral RTOS models. However, such models insufficiently capture preemption as their cooperative decision making is dependent on the timing annotation granularity. In addition to capturing dynamic scheduling, modeling system overhead (e.g. for context switches) becomes essential for guiding developers when deciding the granularity of multitasking applications.