Fast and Accurate Resource Conflict Simulation for Performance Analysis of Multi-Core Systems

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Provided by: European Design and Automation Association
Topic: Hardware
Format: PDF
In this paper, the authors present a SystemC-based simulation approach for fast performance analysis of parallel software components, using source code annotated with low-level timing properties. In contrast to other source-level approaches for performance analysis, timing attributes obtained from binary code can be annotated even if compiler optimizations are used without requiring changes in the compiler. To consider concurrent accesses to shared resources like caches accurately during a source-level simulation, an extension of the SystemC TLM-2.0 standard for reducing the necessary synchronization overhead is proposed as well.
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