Fast Implementations of AES on Various Platforms

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Provided by: EPFL
Topic: Hardware
Format: PDF
In this paper, the authors present new software speed records for encryption and decryption using the block cipher AES-128 for different architectures. Target platforms are 8-bit AVR microcontrollers, NVIDIA Graphics Processing Units (GPUs) and the Cell broadband engine. The new AVR implementation requires 124.6 and 181.3 cycles per byte for encryption and decryption with a code size of less than two kilobyte. Compared to the previous AVR records for encryption their code is 38 percent smaller and 1.24 times faster.
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