Fault Tolerance Design by Accurate SER Estimation for Nano-Scale Circuits

Provided by: WSEAS
Topic: Hardware
Format: PDF
As the transistor sizes continue to shrink, quantum effects will significantly affect the circuit behavior. The inherent unreliability of nano-electronics will have significantly impact on the way of circuits design, so defects and faults of nano-scale circuit technologies have to be taken into account early in the design of digital systems. Fault-tolerant architectures may become a necessity to ensure that the underlying circuit could function properly. In CAD (Computer Aided Design) software, a same logic can be made out with different circuits but different design methodology can reach different soft error tolerance ability, so the authors must find a way to estimate the error rate of the circuit efficiently to make the design more fault tolerant.

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