Fault Tolerance in Multi-Core Processors Using Flexible Redundant Threading

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Provided by: Institute of Research and Journals (IRAJ)
Topic: Data Centers
Format: PDF
In this paper, the authors make a case for incorporating fault tolerance covering both transient faults and errors due to miss-speculation into desktop multi-core processors. Fault tolerance is enforced in their method through redundant threading by verifying the commit results of speculative original thread against the non-speculative redundant thread which is a delayed version of the original thread. Their method differs from previously proposed redundant execution fault-tolerant designs including Active-stream/Redundant-stream Simultaneous Multi-Threading (AR SMT), Simultaneous and Redundantly Threaded (SRT) processor, Chip-level Redundant Threading (CRT) in cases that it covers errors due to miss-speculation, dynamic hardware configuration, reuse of resource for normal computation, flexibility in fault-tolerant enforcement.
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