Institute of Electrical & Electronic Engineers
Cache replacement policies are an essential part of the memory hierarchy used to bridge the gap in speed between CPU and memory. Most of the cache replacement algorithms that can perform significantly better than LRU (Least Recently Used) replacement policy come at the cost of large hardware requirements. With the rise of mobile computing and system-on-chip technology, these hardware costs are not acceptable. The goal of this paper is to design a low cost cache replacement algorithm that achieves comparable performance to existing scheme.