Flexible Register Management using Reference Counting

Conventional out-of-order processors that use a unified physical register file allocate and reclaim registers explicitly using a free list that operates as a circular queue. The authors describe and evaluate a more flexible register management scheme - reference counting. They implement reference counting using a bit-matrix with a column for every physical register and a row for every entity that can hold a physical register, e.g., an in-flight instruction. Columns are NOR'ed together to create a bitvector free list from which registers are allocated using priority encoders.

Provided by: Drexel University Topic: Hardware Date Added: Jan 2012 Format: PDF

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