Flicker: A Dynamically Adaptive Architecture for Power Limited Multicore Systems

Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
Future microprocessors may become so power constrained that not all transistors will be able to be powered on at once. These systems will be required to nimbly adapt to changes in the chip power that is allocated to general-purpose cores and to specialized accelerators. This paper presents Flicker, a general-purpose multicore architecture that dynamically adapts to varying and potentially stringent limits on allocated power. The Flicker core microarchitecture includes reconfigurable lanes-horizontal slices through the pipeline{that permit tailoring an individual core to the running application with lower overhead than microarchitecture-level adaptation, and greater flexibility than core-level power gating.

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