FPGA Implementation of 256-Bit, 64-Point DIT-FFT Using Radix-4 Algorithm

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Provided by: International Journal of Advanced Research in Computer Science and Software Engineering (IJARCSSE)
Topic: Hardware
Format: PDF
Human needs with technical devices are increasing rapidly. In order to meet their requirements the system should be accurate and fast. The fastness and accuracy of a system depends on its intra and inter peripherals/algorithms. In the view of this, the proposed paper came into existence. It focuses on the development of the Fast Fourier Transform (FFT) algorithm, based on Decimation-In-Time (DIT) domain, called Radix-4 DIT-FFT algorithm. VHDL is used as a design entity and for simulation Xilinx ISE. The synthesis results show that the computation for calculating the 256-bit 64-point FFT is efficient in terms of speed and is implemented on FPGA Spartan-3E kit.
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