FPGA Implementation of a Trained Neural Network

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Provided by: Iosrjournals
Topic: Hardware
Format: PDF
In this paper, the authors present the implementation of a trained Artificial Neural Network (ANN) for a certain application. A Multi-Layer Perceptron (MLP) has been synthesized and implemented on Spartan-3 FPGA. The weight matrices and bias has been provided by separate simulation software like Matlab/Simulink. The implemented network has been verified in Xilinx ISE using Verilog programming language. The device utilization summary illustrates that the implemented perceptron utilizes few slices on FPGA which makes it suitable for large scale implementation.
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