In this paper, the authors present Light weight Encryption Device (LED) on Field Programmable Gate Array (FPGA). An optimized code for the light weight encryption algorithm with 128 bits key size and 64 bits block size has been developed. They have designed iterative architecture for speed improvements and hardware elements can be reused for every rounds of operation. A light weight encryption algorithm is essential for secure communication. Further, they are introducing key scheduling for reducing the number of rounds. The target device is Spartan-3 FPGA.