FPGA Implementation of High Performance Carry Select Adder

Provided by: Creative Commons
Topic: Hardware
Format: PDF
The carry-select method has deemed to be a good compromise between cost and performance in carry propagation adder design. However, the conventional Carry-SeLect adder (CSL) is still area-consuming due to the dual ripple-carry adder structure. Carry SeLect Adder (CSLA) is one of the fastest adders used in many data processing processors to perform fast algorithmic functions. It can be implemented using only a single ripple carry adder and add-one circuits instead of using dual ripple carry adders.

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