FPGA Implementation of Ultrasonic S-Scan Coordinate Conversion Based on Radix-4 CORDIC Algorithm

To solve the existing problems on traditional method of calling function at ultrasonic S-scan coordinate conversion, this paper introduced the FPGA implementation of ultrasonic S-scan coordinate conversion based on Radix-4 CORDIC algorithm. On the analysis of the Radix-4 Rotation CORDIC algorithm, the authors selected 7-level pipeline structure on FPGA used the preprocessing technique to solve the non-constant problem of scale factor. The simulation results show that the maximum error of Radix-4 rotation CORDIC algorithm is 1.5×10-3 and the computing latency is only 7T at 16 bit data-width under 100MHz FPGA.

Provided by: International Journal of Engineering and Technology Topic: Hardware Date Added: Jul 2014 Format: PDF

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