Generating and Executing Multi-Exit Custom Instructions for an Adaptive Extensible Processor

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Provided by: edaa
Topic: Hardware
Format: PDF
To improve the performance of embedded processors, an effective technique is collapsing critical computation subgraphs as application-specific instruction set extensions and executing them on custom functional units. The problems of this approach are immense cost and long time of designing. To address these issues, the authors propose an adaptive extensible processor in which Custom Instructions (CIs) are generated and added after chip-fabrication. To support this feature, custom functional units are replaced by a reconfigurable matrix of functional units with the capability of conditional execution. Unlike previous proposed CIs, ours can include multiple exits.
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