National University of Singapore
Various high level hardware description languages have been invented for the purpose of improving the productivity in the generation of customized hardware. Most of these languages are variants, usually parallel versions, of popular software programming languages. In this paper, the authors describe their effort to generate hardware from OpenMP, a software parallel programming paradigm that is widely used and tested. They are able to generate FPGA hardware from OpenMP C programs via synthesizable VHDL and Handel-C. They believe that the addition of this medium-grain parallel programming paradigm will bring additional value to the repertoire of hardware description languages.