Generating the Trace Qualification Configuration for MCDS From a High Level Language

Provided by: edaa
Topic: Hardware
Format: PDF
In recent years the system complexity of modern embedded platforms was exponentially increasing. Single core solutions where replaced by Systems-on-Chip (SoC) integrating multiple heterogeneous processor cores and several different busses. This paper introduces a high level trace qualification language and compiler which enables the user defining analysis tasks efficiently and fully utilize the powerful features of Infineon's Multi-Core Debug Solution (MCDS) without the need of getting into the internals. The language and the compiler are already in industrial use where software development is based on MCDS enabled SoCs to support the developers to achieve better product quality and shorter product development circles.

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