Hardware Implementation of OFDM System to Reduce PAPR using Selective Level Mapping on FPGA
OFDM is a modulation as well as multiplexing technique which is widely used in various high speed mobile and wireless communication systems because of its capacity of ensuring high level robustness against interference. In this paper, the design and implementation of OFDM system along with SLM implementation to reduce PAPR is illustrated and a detailed simulation of the OFDM system with 16-QAM. OFDM transceiver is implemented using FPGA Spartan6 kit. The hardware results show a detailed study of RTL schematics and test bench.