Hardware Implementation of Optimized Kogge Stone Adder
Low power Very Large Scale Integration (VLSI) circuits are important for designing of high performance and portable devices. The high speed, small area and low cost are the main considerations of VLSI circuits. The importance of low power is increasing day-by-day because of changing trend, packaging and cooling cost, portable system and reliability. This paper presents the design and hardware implementation of 32-bit Kogge stone parallel prefix adder. The proposed design is simulated using ISE simulator and synthesized using ISE 14.2. It is implemented on Spartan-3, 3S250EVQ100-5 FPGA device.