Hardware Support for Safety Interlocks and Introspection

Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
Hardware interlocks that enforce semantic invariants and allow fine-grained privilege separation can be built with reasonable costs given modern semiconductor technology. In the common error-free case, these mechanisms operate largely in parallel with the intended computation, monitoring the semantic intent of the computation on an operation-by-operation basis without sacrificing cycles to perform security checks. The authors specifically explore five mechanisms: pointers with manifest bounds (fat pointers), hardware types (atomic groups), processor-supported authority, authority-changing procedure calls (gates) and programmable metadata validation and propagation (tags and dynamic tag management).

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