Helper Transactions: Enabling Thread-Level Speculation via A Transactional Memory System

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Provided by: Georgia Institute of Technology
Topic: Storage
Format: PDF
As multi-core processors become readily available in the market, how to exploit parallelization opportunities to unleash the performance potential has become the utmost concern. Thread-Level Speculation (TLS) has been studied as one such enabling technique to automatically extracting possibly non-conflicting threads for execution in a program. On the other hand, Transactional Memory (TM) systems have received much attention recently as a promising alternative for parallel programming due to its simplicity. However, its current scope of use is largely limited to the elimination of traditional locks.
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