Institute of Electrical & Electronic Engineers
With the advent of System-On-Chip (SOC) technology, there is a pressing need to enhance the quality of design tools available and increase the level of abstraction at which hardware is designed, implemented and programmed. This would reduce the gap between what is currently achievable technologically, and what hardware engineers are capable to produce given time to market constraints. Hardware development should hence become easier and less time consuming, without scarifying the implementation efficiency. Towards this goal, the authors present in this paper a simple structural high-level hardware language called HIDE+, particularly suitable for the rapid generation of highly parameterized, and highly efficient, hardware cores.