The Charge Pump (CP) based Phase-Locked Loop (PLL) includes a Phase Frequency Detector (PFD), a CP, a Low Pass Filter (LPF), a Voltage Controlled Oscillator (VCO) and a DIVider (DIV). A high current matching over full-swing and low-glitch charge pump circuit is proposed. The current of the CP is split into two identical branches having one-half the original current. The two branches are connected in source-coupled structure and a two-stage amplifier is used to regulate the common-source voltage for the minimum current mismatch.