High-Level Language Extensions for Fast Execution of Pipeline-Parallelized Code on Current Chip Multi-Processor Systems

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Provided by: Academy & Industry Research Collaboration Center
Topic: Software
Format: PDF
The last few years have seen multi-core architectures emerge as the defining technology shaping the future of high-performance computing. Although multi-core architectures present tremendous performance potential, to realize the true potential of these systems, software needs to play a key role. In particular, high-level language abstractions and the compiler and the operating system should be able to exploit the on-chip parallelism and utilize underlying hardware resources on these emerging platforms. This paper presents a set of high-level abstractions that allow the programmer to specify, at the source-code level, a variety to of parameters related to parallelism and inter-thread data locality.
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