High Level Synthesis from Sim-nML Processor Models

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Provided by: Indian Institute of Technology Kanpur
Topic: Hardware
Format: PDF
The design of modern complex embedded systems requires a high level of abstraction of the design. The Sim-nML is a specification language to model processors for such designs. Several software generation tools have been developed that take ISA specifications in Sim-nML as input. In this paper, the authors present a tool Sim-HS that implements high level behavioral and structural synthesis of processors from their ISA specifications in Sim-nML. Behavioral Sim-HS transforms Sim-nML specifications of a processor to the corresponding behavioral Verilog model that is suitable for fast functional simulation.
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