High Performance Adaptive Sigma Delta Modulator Design (using LMS Algorithm) for Performance Enhancement of DSP Processors and FPGA Synthesis of the Proposed Architecture

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Provided by: Inpressco
Topic: Data Centers
Format: PDF
Enhancement of the performance and speed of the digital signal processing processors are the major challenge due to its wide spread real world applications. At the same time high quality (less erroneous) and high speed digital inputs are required for these DSP processors. Hence the high performance and high speed A/D or D/A converter design is the another major issue for performance and speed matching with these DSP processors. In this paper a novel technique is introduced to enhancement the performance of the sigma delta modulator using Least Mean Square (LMS) algorithm.
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