High Performance and Low Noise BCD Adder Circuit Design Using Rate Sensing Keeper

Provided by: International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering (IJAREEIE)
Topic: Hardware
Format: PDF
The basic factors which affect any VLSI circuit design are area, speed and power consumption. Full adder is a basic element used in multiplexers, processor designs. Full adders can be implemented using CMOS technology. The CMOS technology plays a major role on the performance of microprocessors on very large scale integrated circuits chips. In this paper, full adder circuit is designed based on conventional domino logic using "Rate sensing keeper" technique. This paper helps to achieve high speed and low noise than conventional CMOS.

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