High Performance Ethernet Packet Processor Core for Next Generation Networks

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Provided by: Academy & Industry Research Collaboration Center
Topic: Hardware
Format: PDF
As the demand for high speed Internet significantly increasing to meet the requirement of large data transfers, real-time communication and High Definition (HD) multimedia transfer over IP, the IP based network products architecture must evolve and change. Application specific processors require high performance, low power and high degree of programmability is the limitation in many general processor based applications. This paper describes the design of Ethernet packet processor for System-on-Chip (SoC) which performs all core packet processing functions, including segmentation and reassembly, packetization classification, route and queue management which will speedup switching/routing performance making it more suitable for Next Generation Networks (NGN).
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