International Journal of Engineering Research and Applications (IJERA)
All of the cryptographic algorithms, the authors have looked at so far have some problem. The earlier ciphers can be broken with ease on modern computation systems. In order to protect \"Data-at-rest\" in storage area networks from the risk of differential power analysis attacks without degrading performance, a high-throughput masked Advanced Encryption Standard (AES) engine is proposed. However this engine adopts an unrolling technique which requires extremely large Field Programmable Gate Array (FPGA) resources. In this paper, they aim to optimize the area for masked AES with an unrolled architecture.