In this paper, the authors describe an efficient Xilinx Virtix4 Discrete Wavelet Transform (DWT) using 9/7 filter based New Efficient Distributed Arithmetic (NEDA) technique. They demonstrate that NEDA is a very efficient architecture with adders as the main component and free of ROM, multiplication, and subtraction. This technique supports any size of image pixel value and any level of decomposition. The bit-parallel structure has 100% hardware utilization efficiency. Compared with the existing multiplier-less structures, the proposed structures offer significantly higher throughput rate and involve less area-delay product.