Research In Motion
High performance digital adder with low power consumption and reduced area is an important design constraint for advanced processors. For such an adder the speed of operation is restricted by carry propagation from input to output. In carry propagation design, Carry SeLect Adder (CSLA) provides a good compromise between cost and performance. In this paper carry select adder using prefix adders i.e., by replacing Ripple Carry Adder (RCA) with C in = 0 with Kogge Stone Adder (KSA) is implemented to reduce delay between intermediate stages with increase in area.