High Speed & High Frequency Based Digital Up/Down Converter for WCDMA System

Provided by: International Journal of Innovations in Engineering and Technology (IJIET)
Topic: Enterprise Software
Format: PDF
In this paper, the authors present FPGA implementation of a Digital Down Converter (DDC) and Digital Up Converter (DUC) for a single carrier WCDMA system. The DDC and DUC is complex in nature. The implementation of digital down converter is simple because it does not require mixers or filters. Xilinx system generator and Xilinx ISE are used to develop the hardware circuit for the FPGA. Both the circuits are verified on the Spartan-3 FPGA.

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