Host-Compiled Simulation of Multi-Core Platforms

Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
Virtual platform models are a popular approach for virtual prototyping of Multi-Processor/multi-Core System-on-Chips (MPCSoCs). Such models aid in system-level design, rapid and early design space exploration, as well as early software development. Traditionally, either highly abstracted models for exploration or low-level, implementation-oriented models for development have been employed. Host-compiled models promise to fill this gap by providing both fast and accurate platform simulation and prototyping. In this paper, the authors aim to provide an overview of state-of-the-art host-compiled platform modeling concepts, techniques and their applicability and benefits.

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