As the power dissipation becomes an important design constraint, especially in embedded systems, early and accurate power estimation is compulsory. The early power estimation dictates the design to meet the required specifications. In this paper, the authors describe efficient power modeling technique for embedded processors at higher level. They also present power models of two different processors using their methodology. Virtual Prototyping (VP) environment is used for benchmarking and power estimation using derived power models. Their methodology combines Functional Level Power Analysis (FLPA) with processor parameters, derived from processor counter information.