I/O-Optimal Distribution Sweeping on Private-Cache Chip Multiprocessors

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Provided by: University of 7th November at Carthage
Topic: Hardware
Format: PDF
Multicore processors are becoming increasingly mainstream. The average desktop computer today contains two to four cores, but Intel announced a 48-core prototype recently and the number is projected to reach hundreds of cores in the near future. The Parallel External Memory (PEM) model has been used as a basis for the design and analysis of a wide range of algorithms for private-cache multi-core architectures. As a tool for developing geometric algorithms in this model, a parallel version of the I/O-efficient distribution sweeping framework was introduced recently, and a number of algorithms for problems on axis-aligned objects were obtained using this framework.
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