International Journal of Computer Applications
In this paper, a comparison is done between MOS Current Mode Logic (MCML) and Complementary Metal-Oxide Semiconductor (CMOS) circuits operating in low power application. It is found that MCML logic circuits exhibit a decrease in delay and so decrease in overall power delay product compared with CMOS circuits. The tested inverter is optimized for low power and high-speed operation, according to the simulation of the circuits for lower voltage. This simulation is done using Tanner EDA.